DESIGN AND EVALUATION OF LVTSCR ESD PROTECTION DEVICE STRUCTURE FOR SUBMICRON CMOS LNA.

Authors

  • Satish M Turkane Research Scholar, Department of E & Tc, Matoshri College of Engineering & Research Centre, Nashik.Savitribai Phule Pune University, Pune, Maharashtra, India.
  • M.U.Khisti Department of E & TC Pravara Rural Engineering College, Loni, Savitribai Phule Pune University,Maharashtra, India
  • A.K.Kureshi Principal,Vishwabharti Academy’sCollege of Engineering, Ahmednagar. Savitribai Phule Pune University, Pune, Maharashtra, India

Keywords:

Differential LNA;, CMOS, linearity;, ESD protection

Abstract

ESD scheme of Radio Frequency integrated circuit is a large challenge as defect of the ESD device model and communication between the main LNA circuit and the protection circuit. The scaling down of technology increases the prerequisite of protection from release of inert electrical energy. The protection scheme should make less influence on the main circuit performance. In this paper, 0.13? m CMOS technology is used to design differential LNA circuit and ESD protection is implemented using LowVoltage Triggered Silicon Controlled Rectifier (LVTSCR). The Radio Frequency ESD scheme is implemented to the 4GHz to 5GHz linear zed LNA. The ESD and the RF LNA circuit scheme are proposed at its device level simulation. In this study, ESD shield is integrated by extracting S parameters. The Human Body Model of 4kV is used for the trial of main LNA circuit performance. The LNA topology used is differential LNA and enhancement in linearity is achieved by using RC feedback. The extracted results are compared as differential LNA circuit with and without ESD.

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Published

2021-03-27

Issue

2015: ICITDCEME

Section

Articles

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