THD analysis using Three and Five Level Inverter

Authors

  • Amarsinha Ranaware E&TC Dept. PES’s College of Engineering Phaltan, India
  • Prof. S. R. Jagtap Ass. Professor, E&TC Dept. Rajarambapu Institute of Technology Islamput, India
  • Milind Gargade E&TC Dept. PES’s College of Engineering Phaltan, India

Keywords:

Inverter, Total Harmonic Distortion, cascaded multilevel inverter, 3 and 5- level MLI, Spartan-3 FPGA.

Abstract

The main disadvantage of Inverters is total harmonic distortion (THD) and harmonics. In this article, harmonics and THD are examined. A stepped multilevel inverter topology is used to suppress the harmonics generated at the inverter output. Cascading multilevel inverters are most useful for fuel cell orbattery storage power. The rated voltage of the battery is low and the cascade inverter input must be low voltage to get 230 v output. The harmonics of the single-phase load and the inverter output are investigated. Compare the harmonics and THDs of 3 and 5-level stepped multilevel inverters with conventional inverter drives. The multilevel inverter topology suppresses harmonics and THD. The result was analyzed using hardware with a spartan-3 FPGA board.

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Published

2023-07-15

Issue

2023: NCETSAE - July

Section

Articles

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