LVDS DESIGN FOR HIGH SPEED APPLICATION

Authors

  • A. A. Boxey Electronics and Telecommunication, Sinhgad College of Engineering, Pune, India
  • Dr. M. B. Mali Electronics and Telecommunication, Sinhgad College of Engineering, Pune, India.

Keywords:

CMOS, SERDES, VLSI

Abstract

The devices are getting smaller due to decrease in feature size this small size makes them more area efficient as well as they operate at very high speeds, So in order to suit such a scenario while data transmission a communication protocol must be present. Low Voltage Differential Signaling (LVDS) is a used for transmission of binary data over copper cable. The main advantage of using LVDS over a normal differential pair is that LVDS consumes much less power and operates at high speed and also has a better noise immunity. This project not only designs a LVDS but also aims to provide a better speed and less power consumption as compared to its previous implementations in [2] using a lower technology and optimizing its performance for a smaller voltage level.

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Published

2021-03-27

Issue

2019: ICSD

Section

Articles

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