DESIGN AND DEVELOPMENT OF A SOFT RECONFIGURABLE POWER ELECTRONIC CONTROL PROCESSOR

Authors

  • KEVIN S ER&DCI, CDAC, Trivandrum,
  • AJEESH A, Senior Engineer, Power Electronics Group, CDAC, Trivandrum,
  • DIVYA D.S, Project Engineer, ER&DCI, CDAC, Trivandrum,

Keywords:

BASIC PROCESSOR DESIGN, NIOSIIPROCESSOR

Abstract

This paper proposesto build a soft, platform independent, reconfigurable power electronic control processor in HDL. Currently power electronic control processors are designed with digital signal processors/microcontrollers with limited re-configurability and input-output capabilities, also DSP/microcontrollers suffer processor obsolescence risk. This can be reduced with the use of a reconfigurable control processor design in HDL and implemented on FPGA. Currently FPGA are used along with DSP for glue logic purpose and input-output expansion. So it is economical to use a single FPGA along with a soft core CPU and control modules as hardware accelerators.Some of the soft coresavailableare licensed and are targetedto a particular FPGA, so a32 bit soft,reconfigurablepower electronic control processor is developed from scratch.

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Published

2021-02-25

Issue

Vol. 5 No. 6 (2018): IJIERT

Section

Articles

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How to Cite

KEVIN S, AJEESH A, & DIVYA D.S,. (2021). DESIGN AND DEVELOPMENT OF A SOFT RECONFIGURABLE POWER ELECTRONIC CONTROL PROCESSOR. International Journal of Innovations in Engineering Research and Technology, 5(6), 1-13. https://repo.ijiert.org/index.php/ijiert/article/view/1520